Shorter data path
On supported platforms, external data is written straight into GPU memory, cutting out the host-memory relay.
PHYSICAL AI · High-speed data interface
On one side of the door is the physical world; on the other, GPU compute. This line is the door itself — bringing heterogeneous, high-rate, tightly time-correlated sensing data into the GPU in a unified, synchronisable and observable way, ready for the algorithm to use directly.
AI-RAN and robotics perception look like two industries, but they run into the same bottleneck.
They differ in interface, rate and timing — and that is exactly what makes this hard.
| Source | Typical data | Why it is difficult |
|---|---|---|
| Radio side | Raw IQ samples, wireless fronthaul data, radar returns | High rate and continuous, with strict requirements on time alignment and zero loss; multi-antenna scenarios add coherence problems |
| Robotics side | Images, point clouds, six-axis force, motion state | Sample rates and latency magnitudes differ enormously between modalities; high-rate raw data and low-rate state data must be ingested to suit their own characteristics |
Each one is something a customer can verify, not a concept.
On supported platforms, external data is written straight into GPU memory, cutting out the host-memory relay.
Unified timestamps, stream identifiers and buffer management support multi-source alignment, record-and-replay and anomaly tracing.
A standard SDK and protocol plug-ins let upper-layer algorithms reuse one data interface instead of being rewritten per device.
High-speed SerDes interfaces raise the proportion of radio and robotics systems that can connect to an AI platform.
Four segments on one path, from physical interface to GPU algorithm.
Front ends support high-speed Ethernet, JESD204B/C, Aurora and custom serial interfaces in stages, covering many physical-layer forms across radio and sensing.
Protocol parsing, hardware timestamping, necessary signal pre-processing, buffering and traffic scheduling happen on the FPGA side.
Data is written into GPU memory over PCIe peer-to-peer DMA and a suitable GPU Direct RDMA path.
CUDA programs handle baseband processing, sensing fusion and AI inference, while the CPU handles configuration, resource management and fault recovery — with its overhead steadily reduced.
Chosen by distance and deployment conditions, not one design for everything.
When the ingress module and FPGA sit in the same chassis, they connect over PCIe. The shortest path and the most controllable latency, for scenarios with the tightest timing requirements.
For deployments that need physical separation, we develop low-power SerDes links where the engineering is about the link itself, not just the protocol.
What this line ultimately unifies are two things that appear to have nothing in common.
Research and planning; there is no deliverable standard product yet. We publish it under "technology direction" rather than "product" precisely so partners know this — and that is also why it is worth talking now: joining at the direction stage carries the lowest cost of change.
Existing approaches mostly focus on the path where sensors reach the GPU over a network. Ethernet encapsulation, transport and NIC processing add cost, and they do not address multi-antenna coherence or the far stricter synchronisation demands of the 6G era. Our direction is to shorten that path itself and to treat sample synchronisation, spatio-temporal semantics and data integrity management as the core problems.
Yes. We are looking primarily for partners with concrete metric requirements and test scenarios, and we work through joint development, paid validation or design-in — proving things under real operating conditions rather than through datasheets.
Once there is measured evidence, yes. We don't want to trade an unverified number for short-term attention — at our stage, promising something we can't deliver costs far more than staying quiet a while longer.
Describe the interface forms, data rates and timing requirements, and we can tell you whether this is doable and where the cheapest way in is.